1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device having a so-called silicon-on-insulator (SOI) structure in which a semiconductor layer is provided on an insulating surface.
2. Description of the Related Art
An integrated circuit using a semiconductor substrate called a silicon on insulator (hereinafter also referred to as “SOI”) substrate in which a thin single crystal semiconductor layer is provided on an insulating surface, instead of using a silicon wafer which is manufactured by thinly slicing an ingot of a single crystal semiconductor, has been developed. An integrated circuit using an SOI substrate has attracted attention as an integrated circuit which reduces parasitic capacitance between the transistors and the substrate and improves performance of the semiconductor integrated circuit.
A transistor is a switching element that is turned on when a certain amount of voltage (referred to as a threshold value or a threshold voltage) is applied to a gate electrode and is turned off when a voltage of less than the certain amount is applied. Therefore, it is very important to control a threshold voltage precisely in terms of accurate operation of a circuit.
However, the threshold voltage of a transistor is, in some cases, moved (shifted) toward the minus side or the plus side by an indefinite factor such as an effect of a movable ion due to contamination and an influence of difference in work function and an interface charge in the periphery of a gate of the transistor.
As a technique proposed as a means for solving such a phenomenon, a channel doping method is given. The channel doping method is a technique in which an impurity element imparting one conductivity type (typically, P, As, B, or the like) is added to at least a channel formation region of a transistor and a threshold voltage is controlled by being shifted intentionally (e.g., see Patent Document 1: Japanese Published Patent Application No. 2003-257992).